The invention relates to a scan method for liquid crystal display, and in particular, to a scan method providing specific scan order that optimizes the image.
In flat panel displays, resolution grows higher and higher, as a result, response time becomes a major issue. FIG. 1 shows a conventional pixel driving circuit 100. The pixel driving circuit 100 is divided into an upper part 106 and a lower part 108, each comprising a plurality of lines. A first gate driver 102 and a second gate driver 104 are coupled to the upper part 106 and lower part 108 respectively for control of the lines therein. The scan order as shown by the arrows in the FIG. 1, recursively scans from the top to the bottom of each half part. The first gate driver 102 and second gate driver 104 need only process a half part of the flat panel display, taking half the time than before, therefore the saved time can be used for additional processes.
FIG. 2 is a timing chart of a conventional scan method, showing the driving order of the 1080 lines in the flat panel display. The 1080 lines are divided into an upper part 106 and lower part 108, each comprising 540 lines. The horizontal axis represents display enable signal DE, and each of the signals G1 to G1080 individually drives a corresponding line. When DE=1, the upper part 106 activates signal G1, and the lower part 108 activates signal G541. The lines are sequentially driven until DE=540, and when DE=541, the process returns to signal G1 and G541, thus forming a loop. A total of 1080 lines are scanned every 540 clocks because two lines are scanned per clock.